AL250 251AL250 251, Elektronika, Datascheets
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AL250/251 Video Scan Doubler Datasheets Version 1.2 Document # 1-D-PMK150-0001 © 2001 ~ 2006 by AverLogic Technologies, Corp. AL250 Contents 1.0 Features ___________________________________________________________________ 3 2.0 Applications ________________________________________________________________ 3 3.0 General Description__________________________________________________________ 4 4.0 Pinout Diagrams ____________________________________________________________ 5 5.0 Marking Information ________________________________________________________ 6 6.0 Pin Definition and Description _________________________________________________ 6 7.0 Functional Description _______________________________________________________ 8 7.1 Digital Input/Output Data Formats _________________________________________________ 8 7.2 Default Resolution _______________________________________________________________ 9 7.3 Video Timing __________________________________________________________________ 10 7.4 Border/Border Color ____________________________________________________________ 14 7.5 OSD Interface__________________________________________________________________ 15 7.6 External Overlay _______________________________________________________________ 16 7.7 Look-up Table (LUT) ___________________________________________________________ 17 7.8 I 2 C Programming _______________________________________________________________ 17 7.9 Video Decoding_________________________________________________________________ 19 8.0 Electrical Characteristics ____________________________________________________ 21 8.1 Recommended Operating Conditions ______________________________________________ 21 8.2 Characteristics _________________________________________________________________ 21 9.0 AL250/251 Register Definition ________________________________________________ 22 9.1 Register Description_____________________________________________________________ 24 10.0 Board Design and Layout Considerations ______________________________________ 30 10.1 Grounding____________________________________________________________________ 30 10.2 Power Planes and Power Supply Decoupling _______________________________________ 30 10.3 Digital Signal and Clock Interconnect _____________________________________________ 30 10.4 Analog Signal Interconnect ______________________________________________________ 30 11.0 Mechanical Drawing _______________________________________________________ 31 12.0 Power Consumption _______________________________________________________ 33 © 2001 ~ 2006 by AverLogic Technologies, Corp. 2 Version 1.2 AL250 AL250/251 Video Scan Doubler 1.0 Features • Internal RGB video lookup table (LUT) to provide gamma correction and special effects • Convert interlaced TV signal (NTSC/PAL) into non-interlaced RGB format for CRT monitors or LCD panels • Overlay support for title making and complex on-screen display • Highly integrated design with built-in DAC, SRAM, OSD and LUT • Self-initialization without software (Plug & Play) • Built-in on-screen-display with programmable bitmap • 3.3 or 5 volt support • 16-bit digital RGB/YUV output (AL251 only) • Interpolated scan doubling with no tearing or jagged edge artifacts • Available in both Lead/Lead-free package • Reduced interlace flicker 2.0 Applications • Auto NTSC/PAL detect • Digital video input of square pixel, ITU-RBT 601 (CCIR 601), or user-defined format • TV-ready Multimedia Computer Monitor • Analog/digital non-interlaced RGB (VGA) signal output (Scan Doubled or Deinterlaced) • TV to PC Video Scan Converter Box • Progressive Scan TV I 2 C programming interface • • Video Game Station Power-down control via I 2 C • • DVD Player • LCD TV Monitor Digital YUV or RGB output (AL251) On-screen Display Video Memory 16 8-bit DAC R RGB Video Lookup Tables Digital YUV or RGB input 16 Video Formatter G 8-bit DAC Video Processor and Scan Doubler B 8-bit DAC VCLK VCLKX2 RSET VREF COMP Timing Control VIDHS VIDVS I 2 C Circuit Mode Control 2 HREF AL250-01 © 2001 ~ 2006 by AverLogic Technologies, Corp. 3 Version 1.2 AL250 3.0 General Description The AL250/251 Video Scan Doubler (De-Interlacer) is a video conversion chip for consumer video and multimedia applications. It converts interlaced NTSC or PAL, ITU-RBT 601 (CCIR 601) or square pixel, YUV422 or RGB565 digital signals into computer monitor RGB signals for direct connection to a computer monitor or progressive scan TV. By using I 2 C interface control, the AL250/251 can also be programmed to co-ordinate with various input resolutions, adjust screen positioning and crop video noise from around the original input video boundary. The internal RGB video lookup tables (LUT), which are controlled via I 2 C interface, can provide gamma correction for calibrating the color accuracy of different types of CRT’s and improving the contrast level to display more vivid pictures. A built-in on-screen-display (OSD) provides programmable bitmap RAM for custom design icons and on-screen control panels. Overlay function is supported to create titling or on-screen-display menus for video adjustment. The AL251 provides all the features of the AL250. Additionally, it has digital output in YUV422 or RGB565 format , and can convert NTSC video for VGA LCD panels . The AverLogic proprietary digital signal processing technology creates a highly stable video image without tearing effects or jagged edges. The output picture is smoother and has less flicker than the original input signal/picture. © 2001 ~ 2006 by AverLogic Technologies, Corp. 4 Version 1.2 1 64 63 62 61 60 59 58 57 NC DO13 DO12 VDIN4 VDIN3 VDIN2 VDIN1 VDIN0 GND 2 NC 3 NC 4 VIDHS 5 1 51 VDD VDIN4 VIDHS 2 50 6 VDIN3 VCLK VDD 3 49 VDIN2 7 VCLK VIDVS 4 48 VDIN1 VIDVS 8 5 47 GND VDIN0 GND 6 46 9 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 VCLKX2 DO7 DO6 VDD VDD DO5 DO4 DO3 DO2 DO1 DO0 OVLCTRL1 OVLCTRL0 GND NC NC NC GND VCLKX2 7 45 10 TESTY7 HREF HREF 8 44 TESTY6 STD0 11 9 43 STD0 VDD STD1 10 42 12 STD1 VDD GND 11 41 13 TESTY5 INTYPE GND 12 40 TESTY4 SQUARE 14 13 39 INTYPE TESTY3 TESTIN 14 38 15 SQUARE TESTY2 I2CADDR 15 37 16 TESTY1 /RESET TESTIN 16 36 TESTY0 SDA 17 17 35 I2CADDR OVLCTRL1 VDD 18 34 18 /RESET SCL OVLCTRL0 19 33 19 GND VDD SDA 20 VDD 21 SCL 22 VDD 23 24 DO8 DO9 [ Pobierz całość w formacie PDF ] |
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