ATmega16 fullATmega16 full, Elektronika, Noty katalogowe
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Features • High-performance, Low-power AVR ® 8-bit Microcontroller Advanced RISC Architecture – 131 Powerful Instructions – Most Single-clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation – Up to 16 MIPS Throughput at 16 MHz – On-chip 2-cycle Multiplier High Endurance Non-volatile Memory segments – 16K Bytes of In-System Self-programmable Flash program memory – 512 Bytes EEPROM – 1K Byte Internal SRAM – Write/Erase Cycles: 10,000 Flash/100,000 EEPROM – Data retention: 20 years at 85°C/100 years at 25°C (1) – Optional Boot Code Section with Independent Lock Bits In-System Programming by On-chip Boot Program True Read-While-Write Operation – Programming Lock for Software Security JTAG (IEEE std. 1149.1 Compliant) Interface – Boundary-scan Capabilities According to the JTAG Standard – Extensive On-chip Debug Support – Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface Peripheral Features – Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes – One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode – Real Time Counter with Separate Oscillator –Four PWM Channels – 8-channel, 10-bit ADC 8 Single-ended Channels 7 Differential Channels in TQFP Package Only 2 Differential Channels with Programmable Gain at 1x, 10x, or 200x – Byte-oriented Two-wire Serial Interface – Programmable Serial USART – Master/Slave SPI Serial Interface – Programmable Watchdog Timer with Separate On-chip Oscillator – On-chip Analog Comparator Special Microcontroller Features – Power-on Reset and Programmable Brown-out Detection – Internal Calibrated RC Oscillator – External and Internal Interrupt Sources – Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby and Extended Standby I/O and Packages – 32 Programmable I/O Lines – 40-pin PDIP, 44-lead TQFP, and 44-pad QFN/MLF Operating Voltages – 2.7 - 5.5V for ATmega16A Speed Grades – 0 - 16 MHz for ATmega16A Power Consumption @ 1 MHz, 3V, and 25 ° C for ATmega16A – Active: 0.6 mA – Idle Mode: 0.2 mA – Power-down Mode: < 1µA 8-bit Microcontroller with 16K Bytes In-System Programmable Flash ATmega16A 1. Pin Configurations Figure 1-1. Pinout ATmega16A PDIP (XCK/T0) PB0 (T1) PB1 (INT2/AIN0) PB2 (OC0/AI N1 ) PB3 (SS) PB4 (MOSI) PB5 (MISO) PB6 (SC K) PB7 RESET VCC GND XTAL2 XTAL1 (RXD) PD0 (TXD) PD1 (INT0) PD2 (INT1) PD3 (OC1B) PD4 (OC1A) PD5 (ICP1) PD6 PA0 (ADC0) PA1 (ADC1) PA2 (ADC2) PA3 (ADC3) PA4 (ADC4) PA5 (ADC5) PA6 (ADC6) PA7 (ADC7) AREF GND AVCC PC7 (TOSC2) PC6 (TOSC1) PC5 (TDI) PC4 (TDO) PC3 (TMS) PC2 (TCK) PC1 (SDA) PC0 (SCL) PD7 (OC2) TQFP/QFN/MLF (MOSI) PB5 (MISO) PB6 (SC K) PB7 RESET VCC GND XTAL2 XTAL1 (RXD) PD0 (TXD) PD1 (INT0) PD2 PA4 (ADC4) PA5 (ADC5) PA6 (ADC6) PA7 (ADC7) AREF GND AVCC PC7 (TOSC2) PC6 (TOSC1) PC5 (TDI) PC4 (TDO) NOTE: Bottom pad should be soldered to ground. 2 ATmega16A 8154A–AVR–06/08 ATmega16A 2. Overview The ATmega16A is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega16A achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. 3 8154A–AVR–06/08 2.1 Block Diagram Figure 2-1. Block Diagram PA0 - PA7 PC0 - PC7 VCC PORTA DRIVERS/BUFFERS PORTC DRIVERS/BUFFERS GND PORTA DIGITAL INTERFACE PORTC DIGITAL INTERFACE AVCC MUX & ADC ADC INTERFACE TWI AREF PROGRAM COUNTER STACK POINTER TIMERS/ COUNTERS OSCILLATOR PROGRAM FLASH SRAM INTERNAL OSCILLATOR XTAL 1 INSTRUCTION REGISTER GENERAL PURPOSE REGISTERS X Y Z WATCHDOG TIMER OSCILLATOR XTAL2 INSTRUCTION DECODER MCU CTRL. & TIMING RESET CONTROL LINES ALU INTERRUPT UNIT INTERNAL CALIBRATED OSCILLATOR AVR CPU STATUS REGISTER EEPROM PROGRAMMING LOGIC SPI USART + - COMP. INTERFACE PORTB DIGITAL INTERFACE PORTD DIGITAL INTERFACE PORTB DRIVERS/BUFFERS PORTD DRIVERS/BUFFERS PB0 - PB7 PD0 - PD7 4 ATmega16A 8154A–AVR–06/08 ATmega16A The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than con- ventional CISC microcontrollers. The ATmega16A provides the following features: 16K bytes of In-System Programmable Flash Program memory with Read-While-Write capabilities, 512 bytes EEPROM, 1K byte SRAM, 32 general purpose I/O lines, 32 general purpose working registers, a JTAG interface for Boundary- scan, On-chip Debugging support and programming, three flexible Timer/Counters with com- pare modes, Internal and External Interrupts, a serial programmable USART, a byte oriented Two-wire Serial Interface, an 8-channel, 10-bit ADC with optional differential input stage with programmable gain (TQFP package only), a programmable Watchdog Timer with Internal Oscil- lator, an SPI serial port, and six software selectable power saving modes. The Idle mode stops the CPU while allowing the USART, Two-wire interface, A/D Converter, SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next External Inter- rupt or Hardware Reset. In Power-save mode, the Asynchronous Timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except Asynchronous Timer and ADC, to minimize switching noise during ADC conversions. In Standby mode, the crystal/reso- nator Oscillator is running while the rest of the device is sleeping. This allows very fast start-up combined with low-power consumption. In Extended Standby mode, both the main Oscillator and the Asynchronous Timer continue to run. The device is manufactured using Atmel’s high density nonvolatile memory technology. The On- chip ISP Flash allows the program memory to be reprogrammed in-system through an SPI serial interface, by a conventional nonvolatile memory programmer, or by an On-chip Boot program running on the AVR core. The boot program can use any interface to download the application program in the Application Flash memory. Software in the Boot Flash section will continue to run while the Application Flash section is updated, providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip, the Atmel ATmega16A is a powerful microcontroller that provides a highly-flexible and cost- effective solution to many embedded control applications. The ATmega16A AVR is supported with a full suite of program and system development tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit emulators, and evaluation kits. 5 8154A–AVR–06/08 [ Pobierz całość w formacie PDF ] |
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