ATtiny28L ATtiny28VATtiny28L ATtiny28V, Dokumenty i Nauka, Elektronika, Mikrokontrolery, z Flash'em, Atmel
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Features • Utilizes the AVR ® RISC Architecture • AVR – High-performance and Low-power RISC Architecture – 90 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General-purpose Working Registers – Up to 4 MIPS Throughput at 4 MHz • Nonvolatile Program Memory – 2K Bytes of Flash Program Memory – Endurance: 1,000 Write/Erase Cycles – Programming Lock for Flash Program Data Security • Peripheral Features – Interrupt and Wake-up on Low-level Input – One 8-bit Timer/Counter with Separate Prescaler – On-chip Analog Comparator – Programmable Watchdog Timer with On-chip Oscillator – Built-in High-current LED Driver with Programmable Modulation • Special Microcontroller Features – Low-power Idle and Power-down Modes – External and Internal Interrupt Sources – Power-on Reset Circuit with Programmable Start-up Time – Internal Calibrated RC Oscillator • Power Consumption at 1 MHz, 2V, 25 ° C – Active: 3.0 mA – Idle Mode: 1.2 mA – Power-down Mode: <1 µA • I/O and Packages – 11 Programmable I/O Lines, 8 Input Lines and a High-current LED Driver – 28-lead PDIP, 32-lead TQFP, and 32-pad MLF • Operating Voltages –V CC : 1.8V - 5.5V for the ATtiny28V –V CC : 2.7V - 5.5V for the ATtiny28L • Speed Grades – 0 - 1.2 MHz for the ATtiny28V – 0 - 4 MHz For the ATtiny28L 8-bit Microcontroller with 2K Bytes of Flash ATtiny28L ATtiny28V Pin Configurations PDIP TQFP/MLF RESET PD0 PD1 PD2 PD3 PD4 VCC GND XTAL1 XTAL2 PD5 PD6 PD7 (AIN0) PB0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 PA0 PA1 PA3 PA2 (IR) PB7 PB6 GND NC VCC PB5 PB4 (INT1) PB3 (INT0) PB2 (T0) PB1 (AIN1) PD3 PD4 NC VCC GND NC XTAL1 XTAL2 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 PB7 PB6 NC GND NC NC VCC PB5 Rev. 1062E–10/01 1 Description The ATtiny28 is a low-power CMOS 8-bit microcontroller based on the AVR RISC archi- tecture. By executing powerful instructions in a single clock cycle, the ATtiny28 achieves throughputs approaching 1 MIPS per MHz, allowing the system designer to optimize power consumption versus processing speed. The AVR core combines a rich instruction set with 32 general-purpose working registers. All the 32 registers are directly con- nected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architec- ture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers. Block Diagram Figure 1. The ATtiny28 Block Diagram VCC XTAL1 XTAL2 8-BIT DATA BUS INTERNAL CALIBRATED OSCILLATOR INTERNAL OSCILLATOR OSCILLATOR GND PROGRAM COUNTER STACK POINTER WATCHDOG TIMER TIMING AND CONTROL RESET PROGRAM FLASH HARDWARE STACK MCU CONTROL REGISTER INSTRUCTION REGISTER GENERAL PURPOSE REGISTERS TIMER/ COUNTER INSTRUCTION DECODER Z INTERRUPT UNIT CONTROL LINES ALU STATUS REGISTER HARDWARE MODUL A TOR PROGRAMMING LOGIC DATA REGISTER PORTB DATA REGISTER PORTD DATA DIR REG. PORTD DATA REGISTER PORTA PORTA CONTROL REGISTER PORTB PORTD PORTA The ATtiny28 provides the following features: 2K bytes of Flash, 11 general-purpose I/O lines, 8 input lines, a high-current LED driver, 32 general-purpose working registers, an 8-bit timer/counter, internal and external interrupts, programmable Watchdog Timer with internal oscillator and 2 software-selectable power-saving modes. The Idle Mode stops the CPU while allowing the timer/counter and interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset. The wake-up or inter- 2 ATtiny28L/V 1062E–10/01 ATtiny28L/V rupt on low-level input feature enables the ATtiny28 to be highly responsive to external events, still featuring the lowest power consumption while in the power-down modes. The device is manufactured using Atmel’s high-density, nonvolatile memory technology. By combining an enhanced RISC 8-bit CPU with Flash on a monolithic chip, the Atmel ATtiny28 is a powerful microcontroller that provides a highly flexible and cost-effective solution to many embedded control applications. The ATtiny28 AVR is supported with a full suite of program and system development tools including: macro assemblers, pro- gram debugger/simulators, in-circuit emulators and evaluation kits. Pin Descriptions VCC Supply voltage pin. GND Ground pin. Port A (PA3..PA0) Port A is a 4-bit I/O port. PA2 is output-only and can be used as a high-current LED driver. At V CC = 2.0V, the PA2 output buffer can sink 25 mA. PA3, PA1 and PA0 are bi-directional I/O pins with internal pull-ups (selected for each bit). The port pins are tri- stated when a reset condition becomes active, even if the clock is not running. Port B (PB7..PB0) Port B is an 8-bit input port with internal pull-ups (selected for all Port B pins). Port B pins that are externally pulled low will source current if the pull-ups are activated. Port B also serves the functions of various special features of the ATtiny28 as listed on page 39. If any of the special features are enabled, the pull-up(s) on the corresponding pin(s) is automatically disabled. The port pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port D (PD7..PD0) Port D is an 8-bit I/O port. Port pins can provide internal pull-up resistors (selected for each bit). The port pins are tri-stated when a reset condition becomes active, even if the clock is not running. XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit. XTAL2 Output from the inverting oscillator amplifier. RESET Reset input. An external reset is generated by a low level on the RESET pin. Reset pulses longer than 50 ns will generate a reset, even if the clock is not running. Shorter pulses are not guaranteed to generate a reset. 3 1062E–10/01 Clock Options The device has the following clock source options, selectable by Flash Fuse bits as shown in Table 1. Table 1. Device Clocking Option Select Clock Option CKSEL3..0 External Crystal/Ceramic Resonator 1111 - 1010 External Low-frequency Crystal 1001 - 1000 External RC Oscillator 0111 - 0101 Internal RC Oscillator 0100 - 0010 External Clock 0001 - 0000 Note: “1” means unprogrammed, “0” means programmed. The various choices for each clocking option give different start-up times as shown in Table 5 on page 14. Internal RC Oscillator The internal RC oscillator option is an on-chip calibrated oscillator running at a nominal frequency of 1.2 MHz. If selected, the device can operate with no external components. The device is shipped with this option selected. Crystal Oscillator XTAL1 and XTAL2 are input and output, respectively, of an inverting amplifier, which can be configured for use as an on-chip oscillator, as shown in Figure 2. Either a quartz crystal or a ceramic resonator may be used. When the INTCAP fuse is programmed, internal load capacitors with typical values 50 pF are connected between XTAL1/XTAL2 and ground. Figure 2. Oscillator Connections MAX 1 HC BUFFER HC C2 XTAL2 C1 XTAL1 GND Note: 1. When using the MCU oscillator as a clock for an external device, an HC buffer should be connected as indicated in the figure. 4 ATtiny28L/V 1062E–10/01 ATtiny28L/V External Clock To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 3. Figure 3. External Clock Drive Configuration NC EXTERNAL OSCILLATOR SIGNAL XTAL2 XTAL1 GND External RC Oscillator For timing insensitive applications, the external RC configuration shown in Figure 4 can be used. For details on how to choose R and C, see Table 25 on page 54. Figure 4. External RC Configuration V CC R NC XTAL2 XTAL1 C GND 5 1062E–10/01 [ Pobierz całość w formacie PDF ] |
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