AN124AN124, ►Elektronika, ►Aplikacje
[ Pobierz całość w formacie PDF ]
Application Note AN124 A Primer on Digitally-Controlled Potentiometers Chuck Wojslaw, Xicor, Inc. The objective of this technical note is to provide the design engineer with the fundamentals of the operation and application of digitally-controlled potentiometers. The block diagram of a typical digitally-controlled potentiometer is shown in Figure 2. The potentiometer is a three terminal variable, resistance- like device whose schematic symbol is shown in Figure 1 V CC (Supply Voltage) . V H /R H Up/Down (U/D) Increment (I NC ) Device Select (CS) CW (V H or R H ) Control and Memory V W /R W V L /R L Wiper (V W or R W ) CCW (V L or R L ) V SS (Ground) Figure 1. Schematic Symbol of the Potentiometer Figure 2. Block Diagram of the Digitally-Controlled Potentiometer There are two types of potentiometers; mechanical and electronic. The terminals of the mechanical potentiometer are called CW (clockwise), CCW (counter clockwise), and wiper. The corresponding names or designations for the terminals of the electronic version are V H or R H , V L or R L , The control and memory section of the device is implemented in CMOS and biased with a 3V or 5V digital or logic supply. The device is controlled through one of three different serial buses; (1) 3-wire, (2) 2-wire similar to I . The mechanical pot is a three terminal device while the electronic pot is an integrated circuit with a minimum of eight terminals. or R W W C, and (3) SPI (Serial Peripheral Interface). The control signals for the 3-wire bus are Up/Down, Increment, and Device Select. The Up/Down control input is a level sensitive signal which establishes the direction of the movement of the wiper. The wiper is moved on the falling edge of the Increment control input in the direction established by the Up/Down signal. The Device Select control input is like an address line and enables or disables the device. The control inputs for the 2-wire bus are Clock (SCL), a bidirectional Serial Data line (SDA), and Address lines (ADDR). The control inputs for the SPI bus are Clock (SCK), Serial In (SI) and Serial Out (SO) data lines, and address lines (ADDR). The 2-wire and SPI serial interfaces have protocols that are explained in the data sheets. Xicor’s digitally-controlled potentiometer (XDCP) is an electronic potentiometer whose wiper position is computer or digitally controlled. The electronic version of the potentiometer also has memory where wiper settings and/ or data can be stored. The digitally-controlled potentiometer (XDCP) is a system level control device performing a component level function. AN124-1 and the wiper V 2 Xicor Application Note AN124 The digitally-controlled potentiometer is an integrated circuit whose implementation is shown in Figure 3. Polycrystalline resistors are connected in series between the R terminals. In many applications, this circuit can be substituted for a digital-to-analog convertor since it performs a digital in, analog out function. terminals and solid state switches implemented by nMOS or CMOS transistors are connected at each end of this resistor array and between the resistors. The switches are equivalent to a single pole, single throw switch. One end of all the switches are tied together and are connected to the wiper terminal. Only one switch will be closed at a time connecting a node in the series resistor array to the wiper. The resistors are polycrystalline silicon deposited on a oxide layer to insulate them from the other circuitry. and R L +5V -5V ® +5V ß -5V Programmable Voltage Figure 4. Three Terminal Configuration and Application V H /R H . A simple application illustrating this configuration is shown in Figure 5 where the potentiometer functions as a variable resistor and, in essence, varies the current through the LED since the voltage across the potentiometer is relatively constant. variable resistance +5V V W /R W Þ Programmable Figure 5. Two Terminal Configuration and Application V L /R L Figure 3. Implementation of the Electronic Potentiometer The two basic applications illustrate the use of the digitally controlled potentiometer in a digital-to-analog voltage circuit and in a digital-to-analog current circuit. The potentiometer can be used in application circuits as a three terminal device or as a two terminal device. The most common way to use the potentiometer as a three terminal device, Figure 4, is as a voltage divider circuit. Plus and/or minus voltages are connected across the Figure 6 expands the block diagram of the XDCP to include the internal registers and data paths. The WCR or Wiper Counter Register is a volatile register whose output determines the position of the wiper by closing a switch connecting the wiper terminal to a point in the resistor array. For the XDCPs with a 2-wire or SPI bus, there are also four nonvolatile Data Registers (R potentiometer and the wiper goes from one voltage limit to ) which can be used to store data or additional wiper settings. The wiper counter and data registers can be programmed from the bus or data can be transferred between the registers 0-3 the other as the wiper is moved from the low to high AN124-2 H The second fundamental way of using the XDCP is as a two terminal, Current Xicor Application Note AN124 is used to store the wiper setting for the power-up condition. For the XDCPs with a 3-wire interface, there is only one internal nonvolatile register per potentiometer, which stores the wiper setting for restoration during the power-up condition. Xicor digitally-controlled potentiometers also come with active devices like operational amplifiers and comparators. The block diagram of the dual pot-dual op amp device is shown in Figure 9. V CC R H(0,1) V NI(0,1) V+ SCL SD A3 A2 A1 A0 WP ACR (0,1) SCL Control and Memory + – (Clock) V H / R 0 R 1 V OUT (0,1) SDA WIPER COUNTER REGISTER (WCR) R H (Data) INTERFACE AND CONTROL A0 8 WCR (0,1) V L / A1 Data R 2 R 3 R L V SS R L(0,1) R W(0,1) V INV(0,1) V– A2 A3 V W / (Address) R W Figure 6. XDCP System Control and Registers Figure 9. Potentiometer and Operational Amplifier C) or SPI serial bus have an instruction set. The typical instructions are shown in Figure 7 along with the typical bit structure in Figure 8. The instructions control the flow of data internally or through the bus, the increment decrement feature, and some specialized commands. The global transfer command transfers data between registers in devices with a multiple number of potentiometers and the write in progress (WIP) instruction monitors the completion of the nonvolatile write process. 2 The terminals of both the potentiometer and the op amp are brought out to accommodate all possible configurations. The op amp is powered or biased with the externally connected V+ and V- analog voltage supplies. The WCR programs the location of the wiper of the potentiometer and the Analog Control Register (ACR) programs features of the operational amplifier. The analog data sheet parameters reflect the limitations of the digitally-controlled potentiometer. The key analog data sheet parameters are number of taps, end to end resistance, maximum voltages on the potentiometer pins, wiper resistance and current, power rating, resolution, noise, linearity, and temperature coefficient. Figure 10 lists the data sheet parameters and their values for a typical XDCP. Read/Write Wiper Counter Register (WCR) Read/Write Data Registers (D) Transfer WCR and D Global Transfer WCR and D Increment/Decrement Wiper Read “WIP” status bit example: X9408 SCL SDA INTER- AND CONTROL A0 A1 A2 A3 The number of taps in a potentiometer varies from 16 to 256 and reflects the resolution of the device or its ability to discern 1 of n. The end to end resistance (R to R ) of the H L Figure 7. Instruction Set potentiometer is R TOTAL and comes in 1k W to 1M W values. Write Wiper Counter Register (WCR) S T A R T device type identifier device addresses S A C K instruction opcode wiper addresses S A C K wiper position (sent by master on SDA) S A C K S T O P 0101 A 3 A 2 A 1 A 0 10100010 00 W P 5 W P 4 W P 3 W P 2 W P 1 W P 0 Byte 1 Byte 2 Byte 3 Slave Acknowledge Two-wire Interface Figure 8. Bit Structure AN124-3 through the device’s instruction set. Normally, data register R 0 The XDCPs with a 2-wire (I F A CE Xicor Application Note AN124 3 to 5V, provides the voltage biasing for the digital control and memory section and V+ and V- provide the voltage biasing for the analog section. The voltages V CC , accuracy and is guaranteed to be 0.2 of an LSB or MI. The potentiometer has a maximum power rating between 10mW and 50mW. Two parameters describe the temperature dependence of R are the maximum voltages, ±5V to +15V, that can be applied to the potentiometer pins in their application. Wiper resistance, nominally 40W, models the resistance r TERMINAL TOTAL and the resistances in TC (temperature coefficient) is a nominal 300ppm/°C and the ratiometric TC is guaranteed to be within 20ppm/°C. TOTAL (on) of the MOS switches used to connect the wiper terminal to a node in the resistor array. The wiper current spec, 1-3mA, limits the maximum amount of current allowed through the wiper switches. Absolute linearity describes the actual versus expected value of the potentiometer when used as a divider and is guaranteed to be accurate within one least significant bit or minimum increment (MI). Relative linearity describes the tap to tap ds While the data sheet parameters reflect the performance limitations of the digitally controlled potentiometer, there are a large number of circuit techniques that minimize these limitations. Xicor application notes and technical briefs describe these techniques and are available at the Xicor’s website www.Xicor.com ANALOG CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.) Limits Symbol Parameter Min. Typ. Max. Units Test Conditions + R TOTAL End to End Resistance –20 +20 % Power Rating 50 mW 25 C, each pot I W Wiper Current –3 +3 mA + R Wiper Resistance 40 100 W V CC = 5V, I W =±1mA W 150 250 V = 2.7-5.5V, I =±1mA CC W Vv+ Voltage on V+ Pin X9410 +4.5 +5.5 V X9410-2.7 +2.7 +5.5 + Vv- Voltage on V- Pin X9410 -5.5 -4.5 V X9410-2.7 -5.5 -2.7 + V TERM Voltage on any V H or V L Pin V- V+ V Noise -140 dBV Ref: 1kHz Resolution (4) 1.6 % Absolute Linearity (1) –1 +1 MI (3) V w(n)(actual) – V w(n)(expected) Relative Linearity (2) –0.2 +0.2 MI (3) V w(n + 1) – [V w(n) + MI ] Temperature Coefficient of R TOTAL ± 300 ppm/ ° C Ratiometric Temp. Coefficient 20 ppm/ ° C Notes: (1) Absolute Linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used as a potentiometer. (2) Relative Linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a potentiometer. It is a measure of the error in step size. (3) MI = RTOT/63 or (V )/63, single pot (4) Iindividual array resolutions. H – V L Figure 10. Analog Data Sheet Parameters AN124-4 The voltage V the series array. R In addition, these publications describe the myriad of possible applications. ° [ Pobierz całość w formacie PDF ] |
Podobne
|